Memory devices are classified into volatile memory devices and non-volatile memory devices depending on whether data is retained at the time of power off. Volatile memory devices are memory devices whose data disappears at the time of power off, and include DRAM and SRAM. Non-volatile memory devices are memory devices whose data is retained even at the time of power off, and include flash memory devices.
Hereinafter, the structure and operation of a conventional non-volatile memory device will be described with reference to FIG. 1. FIG. 1 is a sectional view of a conventional non-volatile memory device.
As shown in FIG. 1, a conventional non-volatile memory device comprises: a substrate 10; and a gate pattern including a tunnel oxide 11, a charge trap layer 12, a blocking oxide 13 and a gate electrode 14 sequentially formed on the substrate 10. Further, the conventional non-volatile memory device includes source/drain (S/D) regions formed at both corners of the substrate 10.
The tunnel oxide 11 is provided as an energy barrier film depending on the tunneling of charges (electrons), and is generally formed of an oxide film. The charge trap layer 12 is actually used as a data storage medium. The charge trap layer 12 stores data by trapping charges into a deep level trap site, and is generally formed of a nitride film. The blocking oxide 13 serves to prevent charges from moving to the gate electrode 14, and is generally formed of an Al2O3 film.
According to the above-mentioned conventional non-volatile memory device, during program operation, charges are tunneled into the charge trap layer 12 by F-N tunneling (Fowler-Nordheim tunneling) and become trapped therein, thus storing data. Further, at the time of erasing data, charges are tunneled from the charge trap layer 12 by F-N tunneling (Fowler-Nordheim tunneling) to be discharged to a channel or holes are injected into the charge trap layer 12, thus erasing data.
However, recently, with improvements in the extent of integration of memory devices, the cell area thereof has been reduced, thus causing a problem of deterioration in the operating speed and data retention characteristics of the memory device. In particular, when the blocking oxide 13 and the gate electrode 14 are formed of an Al2O3 film and a TaN electrode (or polycrystalline silicon electrode), respectively, it is known that many defects occur in an adjacent area of the Al2O3 film and the TaN electrode facing each other, thus further deteriorating the operating speed and data retention characteristics of the memory device. More particularly, in the case of a TaN electrode having a mid-gap work function, an erase saturation phenomenon occurs early, so there is a problem in that a memory window cannot be greatly improved. Therefore, conventionally, in order to improve the operating speed and memory window of a memory device, methods of applying metal gates having a high work function to a memory device have been proposed. However, since most of the metal gates are made of a precious metal such as gold, silver, platinum or the like, there is a problem in that they are not compatible with a CMOS technology and cannot be easily etched.